x86: cpu -- Add new instruction bits to check

Reviewed-by: Dmitry Safonov <0x7f454c46@gmail.com>
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
Signed-off-by: Andrei Vagin <avagin@virtuozzo.com>

criu/arch/x86/cpu.c

@@ -168,8 +168,26 @@ static u32 x86_ins_capability_mask[NCAPINTS] = {
 	[CPUID_D_1_EAX] =
 		__ins_bit(CPUID_D_1_EAX, X86_FEATURE_XSAVEOPT)			|
 		__ins_bit(CPUID_D_1_EAX, X86_FEATURE_XSAVEC)			|
-		__ins_bit(CPUID_D_1_EAX, X86_FEATURE_XGETBV1)			|
-		__ins_bit(CPUID_D_1_EAX, X86_FEATURE_XSAVES),
+		__ins_bit(CPUID_D_1_EAX, X86_FEATURE_XGETBV1),
+
+	[CPUID_7_0_ECX] =
+		__ins_bit(CPUID_7_0_ECX, X86_FEATURE_AVX512VBMI)		|
+		__ins_bit(CPUID_7_0_ECX, X86_FEATURE_AVX512_VBMI2)		|
+		__ins_bit(CPUID_7_0_ECX, X86_FEATURE_GFNI)			|
+		__ins_bit(CPUID_7_0_ECX, X86_FEATURE_VAES)			|
+		__ins_bit(CPUID_7_0_ECX, X86_FEATURE_VPCLMULQDQ)		|
+		__ins_bit(CPUID_7_0_ECX, X86_FEATURE_AVX512_VNNI)		|
+		__ins_bit(CPUID_7_0_ECX, X86_FEATURE_AVX512_BITALG)		|
+		__ins_bit(CPUID_7_0_ECX, X86_FEATURE_TME)			|
+		__ins_bit(CPUID_7_0_ECX, X86_FEATURE_AVX512_VPOPCNTDQ)		|
+		__ins_bit(CPUID_7_0_ECX, X86_FEATURE_RDPID),
+
+	[CPUID_8000_0008_EBX] =
+		__ins_bit(CPUID_8000_0008_EBX, X86_FEATURE_CLZERO),
+
+	[CPUID_7_0_EDX] =
+		__ins_bit(CPUID_7_0_EDX, X86_FEATURE_AVX512_4VNNIW)		|
+		__ins_bit(CPUID_7_0_EDX, X86_FEATURE_AVX512_4FMAPS),
 };
 
 #undef __ins_bit