Commit c3e184f1 authored by Mike Rapoport's avatar Mike Rapoport Committed by Pavel Emelyanov

core-ppc64: mark gregs and clear_tid_addr as (criu).hex

travis-ci: success for core-aarch64: mark gregs and clear_tid_addr as (criu).hex (rev2)
Signed-off-by: 's avatarMike Rapoport <rppt@linux.vnet.ibm.com>
Signed-off-by: 's avatarPavel Emelyanov <xemul@virtuozzo.com>
parent 3396710d
syntax = "proto2"; syntax = "proto2";
import "opts.proto";
message user_ppc64_regs_entry { message user_ppc64_regs_entry {
/* Following is the list of regiters starting at r0. */ /* Following is the list of regiters starting at r0. */
repeated uint64 gpr = 1; repeated uint64 gpr = 1;
...@@ -60,8 +62,8 @@ message user_ppc64_tm_regs_entry { ...@@ -60,8 +62,8 @@ message user_ppc64_tm_regs_entry {
} }
message thread_info_ppc64 { message thread_info_ppc64 {
required uint64 clear_tid_addr = 1; required uint64 clear_tid_addr = 1[(criu).hex = true];
required user_ppc64_regs_entry gpregs = 2; required user_ppc64_regs_entry gpregs = 2[(criu).hex = true];
optional user_ppc64_fpstate_entry fpstate = 3; optional user_ppc64_fpstate_entry fpstate = 3;
optional user_ppc64_vrstate_entry vrstate = 4; optional user_ppc64_vrstate_entry vrstate = 4;
optional user_ppc64_vsxstate_entry vsxstate = 5; optional user_ppc64_vsxstate_entry vsxstate = 5;
......
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