x86: cpu -- Move xsave testing into fpu capability block

xsave sizes should sit in fpu capability block because
instruction and strick mode checkig is a different
thing.
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
Reviewed-by: Dmitry Safonov <0x7f454c46@gmaill.com>
Signed-off-by: Andrei Vagin <avagin@virtuozzo.com>

criu/arch/x86/cpu.c

@@ -261,7 +261,6 @@ static int cpu_validate_features(compel_cpuinfo_t *cpu_info)
 		} else
 			return 0;
 #undef __mismatch_fpu_bit
-	}
 
 		/*
 		 * Make sure the xsave features are compatible. We already hit the
@@ -270,7 +269,7 @@ static int cpu_validate_features(compel_cpuinfo_t *cpu_info)
 		 * xsave frame size directly by xsave instruction with greedy
 		 * feature mask causing programs to misbehave.
 		 */
-	if (cpu_info->xfeatures_mask != rt_cpu_info.xfeatures_mask) {
+		if (cpu_info->xfeatures_mask > rt_cpu_info.xfeatures_mask) {
 			uint64_t m = cpu_info->xfeatures_mask & ~rt_cpu_info.xfeatures_mask;
 			pr_err("CPU xfeatures has unsupported bits (%#llx)\n",
 			       (unsigned long long)m);
@@ -284,6 +283,7 @@ static int cpu_validate_features(compel_cpuinfo_t *cpu_info)
 			       cpu_info->xsave_size_max, rt_cpu_info.xsave_size_max);
 			return -1;
 		}
+	}
 
 	/*
 	 * Capability on instructions level only.