test/zdtm: Adding ppc64 support

Adding ppc64le specific parts to run test on this architecture.
Signed-off-by: Laurent Dufour <ldufour@linux.vnet.ibm.com>
Acked-by: Andrew Vagin <avagin@odin.com>
Signed-off-by: Pavel Emelyanov <xemul@parallels.com>

test/zdtm/Makefile.inc

@@ -19,6 +19,17 @@ ifeq ($(ARCH),x86_64)
 	SRCARCH := x86
 endif
 
+#
+# The PowerPC 64 bits architecture could be big or little endian.
+# They are handled in the same way.
+#
+ifeq ($(shell echo $(ARCH) | sed -e 's/ppc64.*/ppc64/'),ppc64)
+	ifeq ($(ARCH),ppc64)
+		error	:= $(error ppc64 big endian not yet supported)
+	endif
+	SRCARCH	:= ppc64
+endif
+
 CPPFLAGS += -iquote $(LIBDIR)/arch/$(SRCARCH)/include
 
 ifeq ($(strip $(V)),)

test/zdtm/lib/arch/ppc64/include/asm/atomic.h

+#ifndef __CR_ATOMIC_H__
+#define __CR_ATOMIC_H__
+
+/*
+ * PowerPC atomic operations
+ *
+ * Copied from kernel header file arch/powerpc/include/asm/atomic.h
+ */
+typedef uint32_t atomic_t;
+
+#define PPC_ATOMIC_ENTRY_BARRIER	"lwsync \n"
+#define PPC_ATOMIC_EXIT_BARRIER		"sync  	\n"
+
+#define ATOMIC_INIT(i)		{ (i) }
+
+static __inline__ int atomic_get(const atomic_t *v)
+{
+	int t;
+
+	__asm__ __volatile__("lwz%U1%X1 %0,%1" : "=r"(t) : "m"(*v));
+
+	return t;
+}
+
+static __inline__ void atomic_set(atomic_t *v, int i)
+{
+	__asm__ __volatile__("stw%U0%X0 %1,%0" : "=m"(*v) : "r"(i));
+}
+
+#define ATOMIC_OP(op, asm_op)						\
+static __inline__ void atomic_##op(int a, atomic_t *v)			\
+{									\
+	int t;								\
+									\
+	__asm__ __volatile__(						\
+"1:	lwarx	%0,0,%3		# atomic_" #op "\n"			\
+	#asm_op " %0,%2,%0\n"						\
+"	stwcx.	%0,0,%3 \n"						\
+"	bne-	1b\n"							\
+	: "=&r" (t), "+m" (*v)					\
+	: "r" (a), "r" (v)					\
+	: "cc");							\
+}									\
+
+ATOMIC_OP(add, add)
+ATOMIC_OP(sub, subf)
+
+#undef ATOMIC_OP
+
+static __inline__ int atomic_inc(atomic_t *v)
+{
+	int t;
+
+	__asm__ __volatile__(
+	PPC_ATOMIC_ENTRY_BARRIER \
+"1:	lwarx	%0,0,%1		# atomic_inc_return\n\
+	addic	%0,%0,1\n"
+"	stwcx.	%0,0,%1 \n\
+	bne-	1b \n" \
+	PPC_ATOMIC_EXIT_BARRIER
+	: "=&r" (t)
+	: "r" (v)
+	: "cc", "xer", "memory");
+
+	return t;
+}
+
+static __inline__ void atomic_dec(atomic_t *v)
+{
+	int t;
+
+	__asm__ __volatile__(
+"1:	lwarx	%0,0,%2		# atomic_dec\n\
+	addic	%0,%0,-1\n"
+"	stwcx.	%0,0,%2\n\
+	bne-	1b"
+	: "=&r" (t), "+m" (*v)
+	: "r" (v)
+	: "cc", "xer");
+}
+
+#endif /* __CR_ATOMIC_H__ */

test/zdtm/live/static/criu-rtc.c

@@ -30,7 +30,12 @@ int cr_plugin_dump_file(int fd, int id)
 		return -1;
 	}
 
-	if (major(st.st_rdev) != 254 || minor(st.st_rdev) != 0)
+#if defined(__PPC64__)
+#define RTC_DEV_MAJOR	253
+#else
+#define RTC_DEV_MAJOR	254
+#endif
+	if (major(st.st_rdev) != RTC_DEV_MAJOR || minor(st.st_rdev) != 0)
 		return -ENOTSUP;
 
 	if (ioctl(fd, RTC_IRQP_READ, &irqp) == -1) {

test/zdtm/live/static/fanotify00.c

@@ -20,6 +20,9 @@
 #ifdef __x86_64__
 # define __NR_fanotify_init	300
 # define __NR_fanotify_mark	301
+#elif defined(__PPC64__)
+# define __NR_fanotify_init	323
+# define __NR_fanotify_mark	324
 #else
 # define __NR_fanotify_init	338
 # define __NR_fanotify_mark	339