compel: add compel_ prefix to cpu_has_feature

travis-ci: success for compel uapi cleanups
Signed-off-by: Kir Kolyshkin <kir@openvz.org>
Reviewed-by: Cyrill Gorcunov <gorcunov@openvz.org>
Signed-off-by: Pavel Emelyanov <xemul@virtuozzo.com>
Signed-off-by: Andrei Vagin <avagin@virtuozzo.com>

compel/arch/aarch64/src/lib/cpu.c

@@ -18,7 +18,7 @@ void compel_clear_cpu_cap(compel_cpuinfo_t *info, unsigned int feature) { }
 int compel_test_cpu_cap(compel_cpuinfo_t *info, unsigned int feature) { return 0; }
 int compel_cpuid(compel_cpuinfo_t *info) { return 0; }
 
-bool cpu_has_feature(unsigned int feature)
+bool compel_cpu_has_feature(unsigned int feature)
 {
 	if (!rt_info_done) {
 		compel_cpuid(&rt_info);

compel/arch/arm/src/lib/cpu.c

@@ -18,7 +18,7 @@ void compel_clear_cpu_cap(compel_cpuinfo_t *info, unsigned int feature) { }
 int compel_test_cpu_cap(compel_cpuinfo_t *info, unsigned int feature) { return 0; }
 int compel_cpuid(compel_cpuinfo_t *info) { return 0; }
 
-bool cpu_has_feature(unsigned int feature)
+bool compel_cpu_has_feature(unsigned int feature)
 {
 	if (!rt_info_done) {
 		compel_cpuid(&rt_info);

compel/arch/ppc64/src/lib/cpu.c

@@ -32,7 +32,7 @@ int compel_cpuid(compel_cpuinfo_t *info)
 	return 0;
 }
 
-bool cpu_has_feature(unsigned int feature)
+bool compel_cpu_has_feature(unsigned int feature)
 {
 	if (!rt_info_done) {
 		compel_cpuid(&rt_info);

compel/arch/x86/src/lib/cpu.c

@@ -178,7 +178,7 @@ int compel_cpuid(compel_cpuinfo_t *c)
 	return 0;
 }
 
-bool cpu_has_feature(unsigned int feature)
+bool compel_cpu_has_feature(unsigned int feature)
 {
 	if (!rt_info_done) {
 		compel_cpuid(&rt_info);

compel/arch/x86/src/lib/infect.c

@@ -157,7 +157,7 @@ int get_task_regs(pid_t pid, user_regs_struct_t regs, save_regs_t save, void *ar
 		}
 	}
 
-	if (!cpu_has_feature(X86_FEATURE_FPU))
+	if (!compel_cpu_has_feature(X86_FEATURE_FPU))
 		goto out;
 
 	/*
@@ -167,7 +167,7 @@ int get_task_regs(pid_t pid, user_regs_struct_t regs, save_regs_t save, void *ar
 
 	pr_info("Dumping GP/FPU registers for %d\n", pid);
 
-	if (cpu_has_feature(X86_FEATURE_OSXSAVE)) {
+	if (compel_cpu_has_feature(X86_FEATURE_OSXSAVE)) {
 		iov.iov_base = &xsave;
 		iov.iov_len = sizeof(xsave);
 

compel/include/uapi/cpu.h

@@ -6,6 +6,6 @@
 #include <compel/asm/cpu.h>
 
 extern int compel_cpuid(compel_cpuinfo_t *info);
-extern bool cpu_has_feature(unsigned int feature);
+extern bool compel_cpu_has_feature(unsigned int feature);
 
 #endif /* UAPI_COMPEL_CPU_H__ */

criu/arch/x86/cpu.c

@@ -41,17 +41,17 @@ int cpu_init(void)
 	 * Make sure that at least FPU is onboard
 	 * and fxsave is supported.
 	 */
-	if (cpu_has_feature(X86_FEATURE_FPU)) {
-		if (!cpu_has_feature(X86_FEATURE_FXSR)) {
+	if (compel_cpu_has_feature(X86_FEATURE_FPU)) {
+		if (!compel_cpu_has_feature(X86_FEATURE_FXSR)) {
 			pr_err("missing support fxsave/restore insns\n");
 			return -1;
 		}
 	}
 
 	pr_debug("fpu:%d fxsr:%d xsave:%d\n",
-		 !!cpu_has_feature(X86_FEATURE_FPU),
-		 !!cpu_has_feature(X86_FEATURE_FXSR),
-		 !!cpu_has_feature(X86_FEATURE_OSXSAVE));
+		 !!compel_cpu_has_feature(X86_FEATURE_FPU),
+		 !!compel_cpu_has_feature(X86_FEATURE_FXSR),
+		 !!compel_cpu_has_feature(X86_FEATURE_OSXSAVE));
 
 	return 0;
 }
@@ -222,7 +222,7 @@ static int cpu_validate_features(CpuinfoX86Entry *img_x86_entry)
 
 #define __mismatch_fpu_bit(__bit)					\
 		(test_bit(__bit, (void *)img_x86_entry->capability) &&	\
-		 !cpu_has_feature(__bit))
+		 !compel_cpu_has_feature(__bit))
 		if (__mismatch_fpu_bit(X86_FEATURE_FPU)		||
 		    __mismatch_fpu_bit(X86_FEATURE_FXSR)	||
 		    __mismatch_fpu_bit(X86_FEATURE_OSXSAVE)) {

criu/arch/x86/crtools.c

@@ -129,7 +129,7 @@ int save_task_regs(void *x, user_regs_struct_t *regs, user_fpregs_struct_t *fpre
 	assign_array(core->thread_info->fpregs, fpregs->i387, st_space);
 	assign_array(core->thread_info->fpregs, fpregs->i387, xmm_space);
 
-	if (cpu_has_feature(X86_FEATURE_OSXSAVE)) {
+	if (compel_cpu_has_feature(X86_FEATURE_OSXSAVE)) {
 		BUG_ON(core->thread_info->fpregs->xsave->n_ymmh_space != ARRAY_SIZE(fpregs->ymmh.ymmh_space));
 
 		assign_reg(core->thread_info->fpregs->xsave, fpregs->xsave_hdr, xstate_bv);
@@ -162,14 +162,14 @@ int arch_alloc_thread_info(CoreEntry *core)
 	ThreadInfoX86 *ti = NULL;
 
 
-	with_fpu = cpu_has_feature(X86_FEATURE_FPU);
+	with_fpu = compel_cpu_has_feature(X86_FEATURE_FPU);
 
 	sz = sizeof(ThreadInfoX86) + sizeof(UserX86RegsEntry) +
 		GDT_ENTRY_TLS_NUM*sizeof(UserDescT) +
 		GDT_ENTRY_TLS_NUM*sizeof(UserDescT*);
 	if (with_fpu) {
 		sz += sizeof(UserX86FpregsEntry);
-		with_xsave = cpu_has_feature(X86_FEATURE_OSXSAVE);
+		with_xsave = compel_cpu_has_feature(X86_FEATURE_OSXSAVE);
 		if (with_xsave)
 			sz += sizeof(UserX86XsaveEntry);
 	}
@@ -250,7 +250,7 @@ static bool valid_xsave_frame(CoreEntry *core)
 		return false;
 	}
 
-	if (cpu_has_feature(X86_FEATURE_OSXSAVE)) {
+	if (compel_cpu_has_feature(X86_FEATURE_OSXSAVE)) {
 		if (core->thread_info->fpregs->xsave &&
 		    core->thread_info->fpregs->xsave->n_ymmh_space < ARRAY_SIZE(x->ymmh.ymmh_space)) {
 			pr_err("Corruption in FPU ymmh_space area "
@@ -336,7 +336,7 @@ int restore_fpu(struct rt_sigframe *sigframe, CoreEntry *core)
 	assign_array(x->i387, core->thread_info->fpregs, st_space);
 	assign_array(x->i387, core->thread_info->fpregs, xmm_space);
 
-	if (cpu_has_feature(X86_FEATURE_OSXSAVE)) {
+	if (compel_cpu_has_feature(X86_FEATURE_OSXSAVE)) {
 		struct fpx_sw_bytes *fpx_sw = (void *)&x->i387.sw_reserved;
 		void *magic2;